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Gourav Modi
Technologist
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Published a short conference paper on "120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board" at FPGA, Feb 2017
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Published a short conference paper on "Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons" at EPFL, 2016.
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Presented a paper on ”Optimal Deep Learning Algorithm for DSP” in IEEE Circuits and Systems Society (CASS), Singapore Chapter on December 2015
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Published an article on ”Image Compression Overview” in EDN Journal in February 2015.
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Published an article on ”Documentation First! Unifies Design Flow” in EDN Journal on June 2015
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Published a paper on ”Kinetic Energy Recovery System from the flow of exhaust in buildings and industries”, International Journal of Scientific & Engineering Research(IJSER), Volume 4, Issue 9, September-2013, ISSN 2229-5518
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Published a short conference paper on "120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board" at FPGA, Feb 2017
-
Published a short conference paper on "Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons" at EPFL, 2016.
-
Presented a paper on ”Optimal Deep Learning Algorithm for DSP” in IEEE Circuits and Systems Society (CASS), Singapore Chapter on December 2015
-
Published an article on ”Image Compression Overview” in EDN Journal in February 2015.
-
Published an article on ”Documentation First! Unifies Design Flow” in EDN Journal on June 2015
-
Published a paper on ”Kinetic Energy Recovery System from the flow of exhaust in buildings and industries”, International Journal of Scientific & Engineering Research(IJSER), Volume 4, Issue 9, September-2013, ISSN 2229-5518
ACHIEVEMENTS
Anchor 1
Paper Presentation
Noteworthy
activites
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